next up previous contents
Next: 9.1.8 int_tab.asm Up: 9.1 Khepera-Modul Previous: 9.1.6 sci_int.asm

9.1.7 ext_int.asm

******************************************************************************************************
* Studienarbeit      Christopher Odenbach                                                            *
*                                                                                                    *
* WS98/99                                                                                            *
*                                                                                                    *
* mit Dank an Willi                                                                                  *
******************************************************************************************************

******************************************************************************************************
*   MOTOROLA  MC68HC705X32                                                                           *
*                                                                                                    *
*    External Interrupt service routines                                                             *
*                                                                                                    *
*                                                                                                    *
*                                                                                                    *
*                                                                                                    *
*                                                                                                    *
******************************************************************************************************


******************************************************************************************************

******************************************************************************************************
* External Interrupt service routine
******************************************************************************************************

EXT_INT                 EQU     *


SAVE_PORT_DATA          LDA     PORT_A
                        STA     RAM_PORT_A                      ; save data on port A in RAM buffer

                        LDA     PORT_B
                        STA     RAM_PORT_B                      ; save data on port B in RAM buffer

                        JSR     LED_2

R_W_SELECT              BRSET   2,RAM_PORT_B,READ



******************************************************************************************************
* Write Access from Khepera to send data to another Khepera
******************************************************************************************************
WRITE                   EQU     *

ENC_ADDR                AND     #$03                            ; address mask: Bits 0 and 1

                        CMP     #$02                            ; Khepera sends recipient address and
                                                                ; number of bytes to follow
                        BEQ     SET_REC_ADR

                        CMP     #$03                            ; Khepera sends data
                        BEQ     SEND_DATA
                        BRA     HELP_BRA_2                      ; any other address is invalid

SET_REC_ADR             LDA     RAM_PORT_A                      ; Load recipient address
                        AND     #$1F
                        ORA     SENDER_ID_1
                        STA     TX_RAM                          ; set Message-Identifier

                        LDA     #$01
                        STA     REC_ADR_OK                      ; Recipient address is set

                        LDA     RAM_PORT_A
                        AND     #$E0
                        LSRA
                        LSRA
                        LSRA
                        LSRA
                        LSRA
                        STA     SEND_SIZE
                        ADD     #$01                            ; how many bytes to come?
                        ORA     K_BUS
                        ORA     SENDER_ID_2
                        AND     #$EF
                        STA     TX_RAM+1                        ; set Identifier, RTR and data length code
                        CLRA
                        STA     TX_CNT
                        BRA     HELP_BRA_2

SEND_DATA               LDA     REC_ADR_OK
                        CMP     #$01
                        BNE     HELP_BRA_2                      ; stop if no address given

                        LDA     TX_CNT
                        TAX
                        LDA     RAM_PORT_A
                        STA     TX_RAM+2,X                      ; store data in TDS[1-8]
                        LDA     TX_CNT
                        CMP     SEND_SIZE
                        BEQ     TRANSMIT_DATA
                        ADD     #$01
                        STA     TX_CNT
                        BRA     EO_EXT_INT

TRANSMIT_DATA           ADD     #$03                            ; add two for TDI and TRTDL, and one for the loop
                        STA     SEND_SIZE
                        CLRX
TRANSMIT_LOOP           LDA     TX_RAM,X
                        STA     TBI,X
                        INCX
                        TXA
                        CMP     SEND_SIZE
                        BNE     TRANSMIT_LOOP

EO_TRANSMIT_LOOP        LDA     #$81                            ; set transmission request
                        STA     CCOM
                        CLRA
                        STA     TX_RAM_ACC

HELP_BRA_2              BRA     EO_EXT_INT


******************************************************************************************************
* Read Access from Khepera
******************************************************************************************************
READ                    LDA     RAM_PORT_B
                        AND     #$03                            ;mask for address bits adr0 and adr1
                        CMP     #$00                            ;read access to status register?
                        BEQ     WRITE_STATUS
                        CMP     #$01                            ;read access for data?
                        BEQ     WRITE_DATA
                        BRA     EO_EXT_INT

WRITE_STATUS            LDA     K_BUS_REQUEST
                        CMP     #01
                        BNE     EO_EXT_INT

                        BCLR    3,PORT_B                        ;take back Khepera interrupt IRQ6

                        CLRA
                        STA     K_BUS_REQUEST                   ;take back own request bit
                        BRA     WRITE_DATA

WRITE_NULL              CLRA
                        STA     SND_BUF
                        BRA     WRITE_2_K_BUS

WRITE_DATA              LDA     RAM_READ
                        CMP     RX_CNT                          ;already all bytes read?
                        BEQ     WRITE_NULL                      ;no - there is no more!
                        TAX                                     ;put number of read bytes into X
                        INCA                                    ;increase number of read bytes
                        STA     RAM_READ
                        LDA     RX_RAM+2,X                      ;transfer data from RX RAM buffer to PORT A reg.
                        STA     SND_BUF

WRITE_2_K_BUS           BSET    4,PORT_B                        ;oeab = 1
                        BCLR    5,PORT_B                        ;leba = 0

                        LDA     #$FF                            ;all bits on PORT A conf. as outputs
                        STA     DDRA

                        LDA     SND_BUF
                        STA     PORT_A                          ;output data to external buffer

                        BSET    5,PORT_B                        ;leba = 1       => latch data

                        CLRX
                        STX     DDRA                            ;configure PORT A as input

                        BCLR    4,PORT_B                        ;oeab = 0       => enable latch output to port A

                        LDA     RAM_READ                        ;all bytes read?
                        CMP     RX_CNT
                        BNE     EO_EXT_INT
                        LDA     #$01                            ;yes -->
                        STA     RX_RAM_ACC                      ;allow RAM access

                        BRA     EO_EXT_INT


******************************************************************************************************
* End of EXT interrupt subroutine
******************************************************************************************************
EO_EXT_INT              EQU     *
                        RTI

******************************************************************************************************



Christopher Odenbach
1999-06-01