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* Studienarbeit Christopher Odenbach *
* *
* WS98/99 *
* *
* mit Dank an Willi *
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* MOTOROLA MC68HC705X32 *
* *
* Register equates *
* *
* Variables *
* *
* *
* *
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* MCAN registers
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CCNTRL EQU $0020 ;MCAN control register
CCOM EQU $0021 ;MCAN command register
CSTAT EQU $0022 ;MCAN status register
CINT EQU $0023 ;MCAN interrupt register
CACC EQU $0024 ;MCAN acceptance code register
CACM EQU $0025 ;MCAN acceptance mask register
CBT0 EQU $0026 ;MCAN bus timing register 0
CBT1 EQU $0027 ;MCAN bus timing register 1
COCNTRL EQU $0028 ;MCAN output control register
TBI EQU $002A ;transmit buffer identifier register
TRTDL EQU $002B ;remote transmission request and data length
;code register
TDS1 EQU $002C ;transmit data segment register 1
TDS2 EQU $002D ;transmit data segment register 2
TDS3 EQU $002E ;transmit data segment register 3
TDS4 EQU $002F ;transmit data segment register 4
TDS5 EQU $0030 ;transmit data segment register 5
TDS6 EQU $0031 ;transmit data segment register 6
TDS7 EQU $0032 ;transmit data segment register 7
TDS8 EQU $0033 ;transmit data segment register 8
RBI EQU $0034 ;receive buffer identifier register
RRTDL EQU $0035 ;remote transmission request and data length
;code register
RDS1 EQU $0036 ;receive data segment register 1
RDS2 EQU $0037 ;receive data segment register 2
RDS3 EQU $0038 ;receive data segment register 3
RDS4 EQU $0039 ;receive data segment register 4
RDS5 EQU $003A ;receive data segment register 5
RDS6 EQU $003B ;receive data segment register 6
RDS7 EQU $003C ;receive data segment register 7
RDS8 EQU $003D ;receive data segment register 8
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* SCI registers
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SCCR1 EQU $000E ;serial communications control register1
SCCR2 EQU $000F ;serial communications control register2
SCSR EQU $0010 ;serial communications status register
BAUD EQU $000D ;baud rate register
SCDR EQU $0011 ;serial communications data register
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* PORT registers
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PORT_A EQU $0000 ;PORT A data register
PORT_B EQU $0001 ;PORT B data register
PORT_C EQU $0002 ;PORT C data register
PORT_D EQU $0003 ;PORT D data register
DDRA EQU $0004 ;PORT A data direction register
DDRB EQU $0005 ;PORT B data direction register
DDRC EQU $0006 ;PORT C data direction register
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* Processor registers
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MSC EQU $000C ;miscellaneous register
ORG $7FDE ;MOR Mask options register
FCB $60 ;set clock divide ratio to 2
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* Variables
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ORG $0050 ;all small variables stored
;in RAM I from $0050 - $00BF
;variables in RAM II ($0250 - $03AF) can
;be used as well, but not with all
;commands. Best use is with big arrays (buffers)
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* CAN Identifiers
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MASTER RMB 1 ;Master ID
ID RMB 1 ;Own ID
SENDER_ID_1 RMB 1 ;Sender ID first part
SENDER_ID_2 RMB 1 ;Sender ID second part
SCI RMB 1 ;SCI identifier
K_BUS RMB 1 ;K_BUS identifier
CSTAT_BUF RMB 1 ;CSTAT buffer
CINT_BUF RMB 1 ;CINT buffer
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* MCAN interrupt variables
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RX_CNT RMB 1 ;number of bytes received
RX_RAM RMB 10 ;RAM receive buffer
RX_RAM_ACC RMB 1 ;Access to RX RAM buffer allowed
TX_CNT RMB 1 ;number of bytes to send
TX_RAM RMB 10 ;RAM send buffer
TX_RAM_ACC RMB 1 ;Access to TX RAM buffer
SND_ADR RMB 1 ;the sender's address
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* SCI interrupt variables
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BC_IN RMB 1 ;bytecounter serial in
SCSR_BUF RMB 1 ;SCSR buffer
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* EXT interrupt variables
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RAM_READ RMB 1 ;number of bytes already read
RAM_PORT_A RMB 1 ;RAM buffer PORT A
RAM_PORT_B RMB 1 ;RAM buffer PORT B
REC_ADR_OK RMB 1 ;Recipient address ok
SEND_SIZE RMB 1 ;number of bytes to send
K_BUS_REQUEST RMB 1 ;set when k_bus requested
SND_BUF RMB 1 ;buffer for k_bus_data
SCI_TX_RAM RMB 8 ;RAM transmit buffer
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